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Support mixed-precision BSR products (GH-2069) - #2072
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Allow float32 matrix storage to be applied to float64 vectors without allocating a converted matrix. Perform products, accumulation, and scaling in the vector precision while retaining existing dispatch. Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
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| Layer / File(s) | Summary |
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Mixed-precision API and computation warp/_src/sparse.py, docs/domain_modules/sparse.rst, changelog/2069.added.md |
bsr_mv validates vector and output types, uses the vector type for allocation and arithmetic, and casts matrix coefficients before multiplication. The documentation and changelog describe the supported mixed-precision behavior. |
Mixed-precision validation warp/tests/test_sparse.py |
Tests cover floating-point and nonfloating types, transpose modes, layouts, arithmetic, edge cases, aliasing, and CUDA graph capture. Registration applies device and architecture conditions to selected tests. |
CUDA graph benchmark asv/benchmarks/sparse/matrix_vector.py |
The benchmark captures bsr_mv in a CUDA graph and measures graph replay across matrix dtype, blocks per row, tile size, and transpose mode. |
Priority:
Estimated code review effort: 3 (Moderate) | ~25 minutes
Change: Feature
Sequence Diagram(s)
sequenceDiagram
participant Caller
participant bsr_mv
participant BSRKernels
Caller->>bsr_mv: Submit matrix and vector with differing scalar types
bsr_mv->>bsr_mv: Validate types and configure vector-typed output
bsr_mv->>BSRKernels: Pass vector-typed views and scaling factors
BSRKernels->>BSRKernels: Cast matrix coefficients and accumulate
BSRKernels-->>Caller: Write vector-typed output
Suggested reviewers: gdaviet
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Minimal · previous review 27e5e
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Pre-merge checks: 
4 · 
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Failed checks: 1 warning Passed checks: 4 passed -
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Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
[Medium impact] The PR appears safe to merge; no blocking issues were found. SummaryAdds mixed floating-point storage and vector types to
No actionable issues were found. The previous and current commits have different merge bases with the target, so this review covered the full PR diff. No previous review threads were supplied. Reviews (7) · Last reviewed commit: "Merge branch 'main' into feat/bsr-mv-mix..." · Reviewed by Greptile |
gdaviet
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Implementation looks good to me but it should not be limited to float32/float64. The actually implementation is already generic, it is just doc / preconditions that need to be relaxed
The product kernels already convert coefficients to the vector scalar type, so restricting mixed products to one floating-point pair unnecessarily excludes valid storage and arithmetic precision choices. Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
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Inline comments:
Review comments at @warp/_src/sparse.py:
- Around line 5083-5091: Reject unsupported mixed scalar types in the bsr_mv
path before combining scaling factors: import float_types from warp._src.types
and, inside the scalar_type != A.scalar_type branch, raise ValueError unless
both A.scalar_type and scalar_type are floating-point types. Preserve the
existing mixed-precision scaling behavior for supported float combinations.
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changelog/2069.added.mddocs/domain_modules/sparse.rstwarp/_src/sparse.pywarp/tests/test_sparse.py
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Mixed integer and floating-point operands can truncate coefficients or modify the output before a kernel argument error. Validate differing scalar types before scaling or allocation while retaining generic floating-point combinations and existing same-type behavior. Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
Hi @gdaviet. Thanks for your review and time; agreed. I removed the FP32/FP64-specific restriction and updated the docstring, documentation, and changelog. The preconditions now allow all floating-point scalar combinations, including FP16 and BF16, while requiring matching x and y scalar types. Mixed types involving integers are rejected before modifying the output. |
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Thanks for the update; the implementation looks good. One request on the ASV benchmark: |
Repeated GPU setup and a broad parameter grid add unnecessary construction and compilation time to ASV runs. Reuse initialized state per parameter set and retain representative storage and transpose cases. Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
Thanks for the suggestion. Added @setup_once directly to setup, removed the _setup indirection, and reduced the parameter grid to [["float32", "float64"], [32], [0], [False, True]] (four combinations). Verified all four combinations on GPU, including numerical correctness and reuse of the captured graph across repeated setup calls. Pre-commit checks also pass. |
What problem are you trying to solve?
Part of #2069.
bsr_mvrequires the matrix and vectors to have the same scalar type, forcing callers to allocate a converted matrix when matrix storage precision differs from vector arithmetic precision. Allow these types to differ while computing in the vector scalar type.This proposal comes from an independent correctness and performance investigation of #2069. No downstream production deployment or maintainer assignment is claimed.
What does this change?
Support different floating-point matrix and vector scalar types in the existing scalar, CUDA tiled, and transpose paths. Convert each coefficient to the vector scalar type before multiplication; products, accumulation, and scaling use that type. Both wider and narrower vector precision are supported. Mixed types involving integers are rejected before output allocation or modification; existing same-type behavior is preserved. Input and explicit output vectors must have matching scalar types, and an omitted output uses the input scalar type and the matrix's output block shape.
The same rules cover BSR blocks and scaled matrix expressions. Arithmetic cannot recover precision lost when constructing the stored matrix or converting its coefficients to the vector scalar type. Solver dtype inference and autodiff support are outside this change. Row packing is a separate contribution.
Existing pull requests
bsr_mv. Add optional row-packed CUDA BSR products (GH-2069) #2073 adds optional row packing and depends on this contribution.The original overlap search was performed on 2026-10-10.
Validation
float16,float32, andfloat64, plus all seven combinations involvingbfloat16. Exact arithmetic diagnostics verify conversion before multiplication and accumulation in vector precision. New regressions verify that floating/integer and differing integer combinations are rejected without modifying provided or aliased arrays, while matching integer products remain supported.51fddf96also passed 129 linear-solver tests. Native libraries are unchanged from the fresh standard build at that revision; pre-commit and the documentation build with warnings treated as errors pass.Coverage includes scalar and block matrices, compact and padded topology, transpose accumulation, forced CUDA tiling, coefficient downcasts, scaling, output allocation, aliasing, strided vectors, mismatched input/output types, and CUDA graph capture. CPU tests cover automatic/scalar and transpose paths; forced tiling is validated on CUDA.
Checklist
mainand contains one commit, unless a maintainer agreed to keep the change as multiple commits.+prefix only for changes that do not require a GitHub issue.The branch includes the original implementation, the merge of upstream
mainat0382a97e, and focused review follow-ups. The implementation and review follow-ups include DCO sign-off; the changelog fragment ischangelog/2069.added.md.Summary by CodeRabbit
New Features
Documentation
Tests