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Support MXFP8 and deferred route weighting in DeepEP v2 - #40030
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Carry activation scale groups through dispatch and both DeepGEMM layouts. Expose unweighted routes for model finalization and an opt-in FP32 SiLU policy while preserving BF16 and group-128 dispatch behavior. Co-authored-by: Xingyu Liu <38244988+charlotte12l@users.noreply.github.com>
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September 17, 2026 22:31
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/rerun-failed-ci |
Import the callable from its defining module so DeepGEMM initialization cannot shadow FP8 and INT8 wrapper imports with a module.
Keep group-128 activation scales independent of MXFP8 weight scales in the SM120 contiguous producer. Add a regression that runs the producer and validates its DeepGEMM scale recipes.
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/rerun-test test/registered/ep/test_deepep_small_extra.py test/registered/ep/test_routed_experts_dp_readback.py::TestRoutedExpertsReadbackDeepEPv2.test_dp2_readback |
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…d route weighting Reconcile the expand-prefill + fold-topk-weight-into-scale work with upstream sgl-project#40030 (MXFP8 and deferred route weighting in DeepEP v2): - moe_hook.py: gate DeepEP v2 eligibility through model_supports_deepep_v2 instead of a hardcoded architecture tuple - deep_gemm.py: carry activation_scale_block_size through the non-masked expanded pre_permute; skip the post_permute row-weight multiply when fold-into-scale already applied it before down_proj - test_server_args: drive test_validated_architectures_allowed from the registry so new architectures need updating in one place
cyhdmjzzy
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Sep 20, 2026
…d route weighting Reconcile the expand-prefill + fold-topk-weight-into-scale work with upstream sgl-project#40030 (MXFP8 and deferred route weighting in DeepEP v2): - moe_hook.py: gate DeepEP v2 eligibility through model_supports_deepep_v2 instead of a hardcoded architecture tuple - deep_gemm.py: carry activation_scale_block_size through the non-masked expanded pre_permute; skip the post_permute row-weight multiply when fold-into-scale already applied it before down_proj - test_server_args: drive test_validated_architectures_allowed from the registry so new architectures need updating in one place
cyhdmjzzy
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Sep 20, 2026
…d route weighting Reconcile the expand-prefill + fold-topk-weight-into-scale work with upstream sgl-project#40030 (MXFP8 and deferred route weighting in DeepEP v2): - moe_hook.py: gate DeepEP v2 eligibility through model_supports_deepep_v2 instead of a hardcoded architecture tuple - deep_gemm.py: carry activation_scale_block_size through the non-masked expanded pre_permute; skip the post_permute row-weight multiply when fold-into-scale already applied it before down_proj - test_server_args: drive test_validated_architectures_allowed from the registry so new architectures need updating in one place
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Summary
DeepEP v2 rejects 1x32 MXFP8 experts and applies routing weights before model-specific expert finalization. Support group-32 activation scales through dispatch and DeepGEMM, with unweighted route outputs and an opt-in FP32 SiLU policy for registered model architectures.
Motivation
Activation scale groups must be tracked independently of weight scale groups. Models that transform each expert output also need those outputs before router weighting and reduction.
Modifications
Extend the existing SiLU/post-quant kernels to group 32, carry scale metadata through both dispatch layouts, and expose explicit route layouts for finalization. Preserve upstream's BF16 dispatch, FlashInfer adapter, and existing contiguous MXFP8 behavior. The SM120 contiguous producer records its group-128 activation scales independently of MXFP8 weight groups. The scatter expert-range arguments are already upstream and are not duplicated.
Import the quantizer from its defining module in DeepGEMM and the CUDA FP8/INT8 wrappers, so import order cannot replace a callable with the same-named submodule.
Accuracy Tests
GB300 kernel checks compare packed UE8M0 scales and masked/contiguous FP8 codes, including empty experts and partial slabs. Route-output checks cover deferred weighting, nonlocal slots, and empty inputs. Existing BF16/FP8 masked-versus-contiguous DeepGEMM checks also pass.
The SM120 regression exercises its production quantizer and scatter path with platform selection forced on GB300. Before the fix, the resulting scales triggered
MXFP8 activation scale mismatch: block_size=32, K=512, scale_width=1, expected 4. With explicit group-128 metadata, activation and weight recipes remain independent.Test plan
Ran with a Python 3.12 test environment selected through
.venv:Result: 114 passed, 12 subtests passed. The SM120 regression was also run alone before the production fix and failed with the scale-width assertion above.
Also passed:
CI on
40b0ffa328passed lint, all JIT checks, all 11 base-A jobs, all 20 base-B jobs (including B200), all 17 base-C jobs, andpr-test-finish. Base run 35308289435 completed successfully; no base-C exception was needed.Tests use PyTorch 2.11/CUDA 13 on GB300. Native SM120 GEMM execution, native DeepEP communication, and distributed model accuracy were not tested locally.
Speed Tests and Profiling
No serving benchmark was run.
Checklist
Original commits
185637e43120fe1b0b4cd55e037df0de44a1873dCI States
Latest PR Test (Base): ✅ Run #35308289435
Latest PR Test (Extra): ❌ Run #35308289263
Latest PR Test (AMD ROCm 10): ❌ Run #35308289469